====== Weird ASM Code ======
Throughout the SM64 ROM there is a lot of weird assembly code.  The purpose of this page is to document all the ASM weirdness.

===== Kill it Again =====
In case the first ANDI didn't work, the compiler inserts a second one.  It does this two more times.

<code mipsasm>Behavior1F: # begin 80385114 (101E94)
  addiu $sp, $sp, -0x10
  lw    $t6, 0x80361164
  lw    $t7, ($t6)
  srl   $t8, $t7, 0x10
  andi  $t9, $t8, 0xff
  andi  $t0, $t9, 0xff
  sw    $t0, 0xc($sp)</code>

===== Branch Branch Branch =====
All the branch delay slots weren't enough, so the compiler inserted 3 back-to-back branches, including one that can't even be reached!
<code mipsasm># From LevelProc_8024BCD8 starting at 8024BD30:
  b     .L60
  nop   
.L60:
  b     .L70
  lw    $v0, 0x24($sp)
  b     .L70
  nop   
.L70:
  lw    $ra, 0x1c($sp)</code>

===== Unnecessary String Copy =====
Instead of referencing the string directly, a copy is made on the stack. Additionally, instead of calling memcpy or strcpy, a raw set of lw/sw, lb/sb are used inline to copy the data to the stack.
<code mipsasm># From FileConfirmations starting at 80175284/225744
lui   $t5, 0x801a
addiu $t5, $t5, 0x7e98
lw    $at, ($t5)
addiu $t4, $sp, 0x44
lw    $t6, 4($t5)
sw    $at, ($t4)
lw    $at, 8($t5)
sw    $t6, 4($t4)
lw    $t6, 0xc($t5)
sw    $at, 8($t4)
lw    $at, 0x10($t5)
sw    $t6, 0xc($t4)
sw    $at, 0x10($t4)
lbu   $at, 0x14($t5)
sb    $at, 0x14($t4)</code>